Evaluation of die edge cracking in flip-chip PBGA packages
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx5/6144/28125/01257448.pdf?arnumber=1257448
Cited by 21 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Overcoming Assembly Process Challenges in Glass Interposer: Development of Jigs and Fixtures;2023 IEEE 25th Electronics Packaging Technology Conference (EPTC);2023-12-05
2. Investigation of Underfill Delamination in Flip Chip Packages by Finite Element Analysis;2022 23rd International Conference on Electronic Packaging Technology (ICEPT);2022-08-10
3. Backside Die-Edge and Underfill Fillet Cracks Induced by Additional Tensile Stress from Increasing Die-to-Package Ratio in Bare-Die FCBGA;2020 IEEE International Reliability Physics Symposium (IRPS);2020-04
4. Flip-Chip (FC) and Fine-Pitch-Ball-Grid-Array (FPBGA) Underfills for Application in Aerospace Electronics—Brief Review;Aerospace;2018-07-08
5. A. Failure Mechanisms and Failure Analysis;3D IC and RF SiPs;2018-03-31
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