SPIN: a scalable, packet switched, on-chip micro-network
Author:
Publisher
IEEE Comput. Soc
Link
http://xplorestaging.ieee.org/ielx5/8443/26600/01253808.pdf?arnumber=1253808
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2. Extension of the LISNoC (Network -on-chip) with an AXI-based Network Interface;2022 6th International Conference on Computing Methodologies and Communication (ICCMC);2022-03-29
3. Review, Analysis, and Implementation of Path Selection Strategies for 2D NoCs;IEEE Access;2022
4. On-Chip Networks, Second Edition;Synthesis Lectures on Computer Architecture;2017-06-17
5. FONoC: A Fat Tree Based Optical Network-on-Chip for Multiprocessor System-on-Chip;Integrated Optical Interconnect Architectures for Embedded Systems;2012-09-27
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