An efficient on-chip network interface offering guaranteed services, shared-memory abstraction, and flexible network configuration

Author:

Radulescu A.,Dielissen J.,Goossens K.,Rijpkema E.,Wielage P.

Publisher

IEEE Comput. Soc

Cited by 21 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. AXI, APB and AXI NOC Model Design Based on SysmteC;Proceedings of the 2022 11th International Conference on Networks, Communication and Computing;2022-12-09

2. Slicing Architecture for Managing User Mobility in Next-Generation Heterogeneous Wireless Networks;2019 12th International Conference on Developments in eSystems Engineering (DeSE);2019-10

3. Network adapter architectures in network on chip: comprehensive literature review;Cluster Computing;2019-03-15

4. A power-optimized, area-efficient implementation of Connection-Then-Credit NoC physical layer;Microelectronics Journal;2017-10

5. Converting Interfaces on Application-specific Network-on-chip;JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE;2017-08-31

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