A Hybrid Prefetch Scheduling Heuristic to Minimize at Run-Time the Reconfiguration Overhead of Dynamically Reconfigurable Hardware-Reference-Cited by-同舟云学术

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A Hybrid Prefetch Scheduling Heuristic to Minimize at Run-Time the Reconfiguration Overhead of Dynamically Reconfigurable Hardware

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Container-title:Design, Automation and Test in Europe
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Author:

Resano J.,Mozos D.,Catthoor F.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/9609/30361/01395539.pdf?arnumber=1395539

Cited by 26 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Survey: FPGA‐Based Dynamic Scheduling of Hardware Tasks;Chinese Journal of Electronics;2021-11

2. A prefetch-aware scheduling for FPGA-based multi-task graph systems;The Journal of Supercomputing;2020-01-13

3. An Optimized Frame-Driven Routing Algorithm for Reconfigurable SRAM-Based FPGAs;IEEE Access;2020

4. A survey on partitioning models, solution algorithms and algorithm parallelization for hardware/software co-design;Design Automation for Embedded Systems;2019-04-30

5. Reducing Reconfiguration Overheads Using Configuration Prefetch, Optimal Reuse, and Optimal Memory Mapping;National Academy Science Letters;2019-04-06

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