CLA based Floating-point adder suitable for chaotic generators on FPGA-Reference-Cited by-同舟云学术

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CLA based Floating-point adder suitable for chaotic generators on FPGA

Published:2018-12 Issue: Volume: Page:
ISSN:
Container-title:2018 30th International Conference on Microelectronics (ICM)
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Author:

Hassan Hossam S.,Ismail Samar M.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/8698775/8703878/08704074.pdf?arnumber=8704074

Cited by 7 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Hardware Realization of High-Speed Area-Efficient Floating Point Arithmetic Unit on FPGA;2024 International Conference on Machine Intelligence and Smart Innovation (ICMISI);2024-05-12

2. Reconfigurable hardware implementation of K-nearest neighbor algorithm on FPGA;AEU - International Journal of Electronics and Communications;2024-01

3. Comparative Analysis of Power, Temperature and Hardware Utilization on Implementation of 4-Bit Comparator;2023 2nd International Conference on Futuristic Technologies (INCOFT);2023-11-24

4. A New Chaos-Based PRNG Hardware Architecture Using the HUB Fixed-Point Format;IEEE Transactions on Instrumentation and Measurement;2023

5. Register Transfer Level Model For CNN Tumor Detection on FPGA;2021 International Conference on Microelectronics (ICM);2021-12-19

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