Lightweight Neural Network Architectures for Resource-Limited Devices-Reference-Cited by-同舟云学术

Lightweight Neural Network Architectures for Resource-Limited Devices

Published:2022-04-06 Issue: Volume: Page:
ISSN:
Container-title:2022 23rd International Symposium on Quality Electronic Design (ISQED)
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Author:

Reed April L.¹,Yang Xiaokun¹,Sha Shi²

Affiliation:

1. University of Houston Clear Lake,Engineering Department,Houston,USA

2. Wilkes University,Electrical Engineering,Wilkes-Barre,USA

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9806045/9806137/09806151.pdf?arnumber=9806151

Reference21 articles.

1. From high-level deep neural models to FPGAs

2. Implementation of Data-optimized FPGA-based Accelerator for Convolutional Neural Network

3. FPGA-based convolutional neural network accelerator design using high level synthesize

4. An FPGA-based accelerator implementation for deep convolutional neural networks;zhou;2015 Intl Conference on Computer Science and Network Technology,2015

5. FPGA Implementation of CNN for Hand-written Digit Recognition;xiao;IEEE Information Technology Networking Electronic and Automation Control Conference,2020

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1. Parameterizable Design on Convolutional Neural Networks Using Chisel Hardware Construction Language;Micromachines;2023-02-24

2. Evaluating FPGA Acceleration on Binarized Neural Networks and Quantized Neural Networks;2022 International Symposium on Measurement and Control in Robotics (ISMCR);2022-09-28

3. Case Studies of Configurable Binary Design Library on FPGA;2022 International Symposium on Measurement and Control in Robotics (ISMCR);2022-09-28