A Content Adapted FPGA Memory Architecture with Pattern Recognition Capability for L1 Track Triggering in the LHC Environment
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Publisher
IEEE
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http://xplorestaging.ieee.org/ielx7/7535576/7544722/07544775.pdf?arnumber=7544775
Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Real-Time Graph Building on FPGAs for Machine Learning Trigger Applications in Particle Physics;Computing and Software for Big Science;2024-03-21
2. High Speed Partial Pattern Classification System Using a CAM-Based LBP Histogram on FPGA;IEEE Embedded Systems Letters;2020-09
3. Modifying quantum Grover’s algorithm for dynamic multi-pattern search on reconfigurable hardware;Journal of Computational Electronics;2020-04-22
4. Design Exploration of LH-CAM with Updating Mechanism;Proceedings of International Joint Conference on Computational Intelligence;2020
5. High-Throughput Re-configurable content-addressable memory on FPGAs;Proceedings of the 2019 International Conference on Information Technology and Computer Communications - ITCC 2019;2019
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