Implementing FPGA Overlay NoCs Using the Xilinx UltraScale Memory Cascades
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3 articles.
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1. A Routability-Driven Ultrascale FPGA Macro Placer with Complex Design Constraints;2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM);2024-05-05
2. RingNet: A Memory-Oriented Network-On-Chip Designed for FPGA;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2019-06
3. Hoplite-Q: Priority-Aware Routing in FPGA Overlay NoCs;2018 IEEE 26th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM);2018-04