Aliasing Suppression With Negligible Phase Lag for Multi-Sampled LCL-Type Grid-Tied Inverter
Author:
Affiliation:
1. College of Electrical Engineering, Zhejiang University, Hangzhou, China
Funder
National Natural Science Foundation of China
Scientific Research Fund of Zhejiang Provincial Education Department
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/63/10242191/10183359.pdf?arnumber=10183359
Reference41 articles.
1. A Real-Time Computation Method With Dual Sampling Mode to Improve the Current Control Performance of the $LCL$-Type Grid-Connected Inverter
2. Optimized Design of the Neutral Inductor and Filter Inductors in Three-Phase Four-Wire Inverter With Split DC-Link Capacitors
3. A Simple Method for Passivity Enhancement of Current Controlled Grid-Connected Inverters
4. Capacitor-Current-Feedback Active Damping With Reduced Computation Delay for Improving Robustness of LCL-Type Grid-Connected Inverter
Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. High Performance Multi-Sampled Control for Power Electronics Converters;2023 22nd International Symposium on Power Electronics (Ee);2023-10-25
2. Advanced Modulation Technique for Power Electronic Converters in Grid-Tied Inverters;2023 International Conference on Evolutionary Algorithms and Soft Computing Techniques (EASCT);2023-10-20
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