Optimum polymorphic circuits synthesis method-Reference-Cited by-同舟云学术

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Optimum polymorphic circuits synthesis method

Published:2018-04 Issue: Volume: Page:
ISSN:
Container-title:2018 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS)
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Author:

Fiser Petr,Simek Vaclav

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/8362838/8368541/08368585.pdf?arnumber=8368585

Cited by 5 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Directed Acyclic Graph-Based Datapath Synthesis Using Graph Isomorphism and Gate Reconfiguration;Chips;2024-06-04

2. Towards Area Efficient Logic Circuit: Exploring Potential of Reconfigurable Gate by Generic Exact Synthesis;IEEE Open Journal of the Computer Society;2023

3. A Novel Circuit Authentication Scheme Based on Partial Polymorphic Gates;2021 Asian Hardware Oriented Security and Trust Symposium (AsianHOST);2021-12-16

4. SAT-Based Generation of Optimum Circuits with Polymorphic Behavior Support;Journal of Circuits, Systems and Computers;2019-12-01

5. PAIG Rewriting: The Way to Scalable Multifunctional Digital Circuits Synthesis;2019 22nd Euromicro Conference on Digital System Design (DSD);2019-08

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