Parallelizing Stochastic Gradient Descent with Hardware Transactional Memory for Matrix Factorization
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IEEE
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http://xplorestaging.ieee.org/ielx7/8614272/8614462/08614731.pdf?arnumber=8614731
Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Stochastic Gradient Descent for matrix completion: Hybrid parallelization on shared- and distributed-memory systems;Knowledge-Based Systems;2024-01
2. Load balanced locality-aware parallel SGD on multicore architectures for latent factor based collaborative filtering;Future Generation Computer Systems;2023-09
3. BaPa: A Novel Approach of Improving Load Balance in Parallel Matrix Factorization for Recommender Systems;IEEE Transactions on Computers;2021-05-01
4. A Reliable Gravity Compensation Control Strategy for dVRK Robotic Arms With Nonlinear Disturbance Forces;IEEE Robotics and Automation Letters;2019-10
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