Model-based guidelines to suppress cable discharge event (CDE) induced latchup in CMOS ICs

Author:

Chatty K.,Cottrell P.,Gauthier R.,Muhammad M.,Stellari F.,Weger A.,Song P.,McManus M.

Publisher

IEEE

Cited by 19 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

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2. Closed-Form Model for Calculating the Current Induced by the TEM-Cell Center Conductor;2024 IEEE 25th International Conference of Young Professionals in Electron Devices and Materials (EDM);2024-06-28

3. On the Safety Distance to avoid Transient Latchup during System Level ESD Stress;2023 45th Annual EOS/ESD Symposium (EOS/ESD);2023-10-02

4. Soft-Failures Induced by System-Level ESD;IEEE Transactions on Device and Materials Reliability;2017-03

5. Modeling and Understanding of External Latchup in CMOS Technologies—Part II: Minority Carrier Collection Efficiency;IEEE Transactions on Device and Materials Reliability;2011-09

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