Funder
U.S. DOE Office of Science Office of Advanced Scientific Computing Research
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Computational Theory and Mathematics,Hardware and Architecture,Signal Processing
Cited by
21 articles.
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1. Extending the SYCL Joint Matrix for Binarized Neural Networks;2024 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW);2024-05-27
2. Accelerating ML Workloads using GPU Tensor Cores: The Good, the Bad, and the Ugly;Proceedings of the 15th ACM/SPEC International Conference on Performance Engineering;2024-05-07
3. Neural Network Compression Based on Tensor Ring Decomposition;IEEE Transactions on Neural Networks and Learning Systems;2024
4. BiViT: Extremely Compressed Binary Vision Transformers;2023 IEEE/CVF International Conference on Computer Vision (ICCV);2023-10-01
5. A Novel Parallel Algorithm for Sparse Tensor Matrix Chain Multiplication via TCU-Acceleration;IEEE Transactions on Parallel and Distributed Systems;2023-08