Funder
National Research Foundation of Korea
Institute for Information and Communications Technology Promotion
CUDA Programming Environment for FPGA Clusters
Ministry of Science and ICT, South Korea
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Computational Theory and Mathematics,Hardware and Architecture,Signal Processing
Cited by
11 articles.
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1. Signal, Power and Thermal Co-optimization Methodology for FPGA Advanced Package;2024 IEEE 74th Electronic Components and Technology Conference (ECTC);2024-05-28
2. An Edge-Side Real-Time Video Analytics System With Dual Computing Resource Control;IEEE Transactions on Computers;2023-12
3. An approach to the systematic characterization of multitask accelerated CNN inference in edge MPSoCs;ACM Transactions on Embedded Computing Systems;2023-08-04
4. On-silicon Capacitor Sharing Technique Based on Package Power Merging for PDN Optimization;2023 IEEE Symposium on Electromagnetic Compatibility & Signal/Power Integrity (EMC+SIPI);2023-07-29
5. FPGA Deployment of Deep Neural Network for Modulation Recognition;2023 IEEE 13th International Conference on CYBER Technology in Automation, Control, and Intelligent Systems (CYBER);2023-07-11