Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Computational Theory and Mathematics,Hardware and Architecture,Theoretical Computer Science,Software
Cited by
10 articles.
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1. LBDR: A load-balanced deadlock-free routing strategy for chiplet systems;Integration;2024-05
2. ASDR;Proceedings of the 16th International Workshop on Network on Chip Architectures;2023-10-28
3. Heterogeneous Die-to-Die Interfaces: Enabling More Flexible Chiplet Interconnection Systems;56th Annual IEEE/ACM International Symposium on Microarchitecture;2023-10-28
4. ERAS: A Flexible and Scalable Framework for Seamless Integration of RTL Models with Structural Simulation Toolkit;2023 IEEE International Symposium on Workload Characterization (IISWC);2023-10-01
5. A Scalable Methodology for Designing Efficient Interconnection Network of Chiplets;2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA);2023-02