Funder
National Science Foundation
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Computational Theory and Mathematics,Hardware and Architecture,Theoretical Computer Science,Software
Cited by
22 articles.
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1. FlattenRTL: An Open Source Tool for Flattening Verilog Module at RTL Level;2024 2nd International Symposium of Electronics Design Automation (ISEDA);2024-05-10
2. RTL-Spec: RTL Spectrum Analysis for Security Bug Localization;2024 IEEE International Symposium on Hardware Oriented Security and Trust (HOST);2024-05-06
3. Incremental Concolic Testing of Register-Transfer Level Designs;ACM Transactions on Design Automation of Electronic Systems;2024-05-03
4. ATIU: An Automated Method for Testing Embedded C/C++ Projects Containing Incomplete Units;Lecture Notes in Networks and Systems;2024
5. SurgeFuzz: Surge-Aware Directed Fuzzing for CPU Designs;2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD);2023-10-28