Hybrid Binary-Unary Hardware Accelerator

Author:

Faraji S. RasoulORCID,Bazargan KiaORCID

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Computational Theory and Mathematics,Hardware and Architecture,Theoretical Computer Science,Software

Cited by 17 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. SimBU: Self-Similarity-Based Hybrid Binary-Unary Computing for Nonlinear Functions;IEEE Transactions on Computers;2024-09

2. A Brief Survey on Randomizer Design and Optimization for Efficient Stochastic Computing;2024 IEEE International Test Conference in Asia (ITC-Asia);2024-08-18

3. Carat: Unlocking Value-Level Parallelism for Multiplier-Free GEMMs;Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2;2024-04-27

4. Stochastic-Binary Hybrid Spatial Coding Multiplier for Convolutional Neural Network Accelerator;IEEE Transactions on Nanotechnology;2024

5. Constant Coefficient Multipliers Using Self-Similarity-Based Hybrid Binary-Unary Computing;2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD);2023-10-28

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