Modified Karatsuba Approximate Multiplier for error-resilient applications
Author:
Affiliation:
1. Velagapudi Ramakrishna Siddhartha Engineering College,Dept of Electronics and communication Engineering,Vijayawada,India
2. Velagapudi Ramakrishna Siddhartha Engineering College,Vijayawada,India
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10537602/10537618/10537768.pdf?arnumber=10537768
Reference14 articles.
1. Design of an Enhanced Array Based Approximate Arithmetic Computing Model for Multipliers and Squarers
2. Approximate computing: An emerging paradigm for energy-efficient design
3. Low power Wallace multiplier design based on wide counters
4. DRUM: A Dynamic Range Unbiased Multiplier for approximate applications
5. Multiplier-less artificial neurons exploiting error resiliency for energy-efficient neural computing;Sarwar
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