Design and Implementation of a High-Speed, Power-Efficient, Modified Hybrid-Mode Sense Amplifier for SRAM Applications-Reference-Cited by-同舟云学术

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Design and Implementation of a High-Speed, Power-Efficient, Modified Hybrid-Mode Sense Amplifier for SRAM Applications

Published:2013-01 Issue: Volume: Page:
ISSN:
Container-title:2013 26th International Conference on VLSI Design and 2013 12th International Conference on Embedded Systems
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Author:

Bhattacharya Debajit,Maity Ashis,Patra Amit

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/6472449/6472603/06472641.pdf?arnumber=6472641

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Bihari Identity: An Uncharted Question;Psychology and Developing Societies;2019-08-13

2. A New Sense Amplifier Topology with Improved Performance for High Speed SRAM Applications;2016 29th International Conference on VLSI Design and 2016 15th International Conference on Embedded Systems (VLSID);2016-01

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