Design of QAM in 45nm Using Cadence Tool
Author:
Affiliation:
1. K.L.E. Institute of Technology,Dept. of Electronics and Communication Engg,Hubballi,Karnataka,India,580027
2. KLE Institute of Technology,Dept. of Electronics and Communication Engg,Hubli,India
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9908521/9908593/09909362.pdf?arnumber=9909362
Reference18 articles.
1. CMOS Digital Integrated Circuits: Analysis and Design;kang,0
2. CMOS VLSI Design-A Circuits and Systems Perspective;weste,0
3. Digital Communication Systems;haykin,2014
4. Fundamentals of Communication Systems;proakis,2014
5. 8x8 SFQ based Multiplier design using Verilog in Cadence
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