Highly Manufacturable 45nm LSTP CMOSFETs Using Novel Dual High-k and Dual Metal Gate CMOS Integration
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/11173/35986/01705193.pdf?arnumber=1705193
Cited by 17 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Drain Induced Barrier Widening and Reverse Short Channel Effects in Tunneling FETs: Investigation and Analysis;IEEE Access;2021
2. Effect of Drain Induced Barrier Enhancement on Subthreshold Swing and OFF-State Current of Short Channel MOSFETs: A TCAD Study;IEEE Access;2021
3. Implementation of Boolean Functions Using Tunnel Field-Effect Transistors;IEEE Journal on Exploratory Solid-State Computational Devices and Circuits;2020-12
4. Realizing XOR and XNOR Functions Using Tunnel Field-Effect Transistors;IEEE Journal of the Electron Devices Society;2020
5. Exploiting Within-Channel Tunneling in a Nanoscale Tunnel Field-Effect Transistor;IEEE Open Journal of Nanotechnology;2020
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