Skip the Analysis: Self-Optimising Networks-on-Chip (Invited Paper)-Reference-Cited by-同舟云学术

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Skip the Analysis: Self-Optimising Networks-on-Chip (Invited Paper)

Published:2010-12 Issue: Volume: Page:
ISSN:
Container-title:2010 International Symposium on Electronic System Design
language:
Short-container-title:

Author:

Hollis S J,Jackson C

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/5714410/5715132/05715139.pdf?arnumber=5715139

Cited by 4 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Reinforcement Learning Enabled Multi-Layered NoC for Mixed Criticality Systems;2023 IEEE 16th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC);2023-12-18

2. CSquare: A new kilo-core-oriented topology;Microprocessors and Microsystems;2015-06

3. WaveSync;ACM Transactions on Design Automation of Electronic Systems;2014-08

4. A dynamically reconfigurable communication architecture for multicore embedded systems;Journal of Systems Architecture;2012-03

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