Analysis of power combiner architecture for push-pull transistors with on-chip and on-board coupling
Author:
Affiliation:
1. Bharat Electronics Limited,Central Research Laboratory,Bengaluru,India
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10463756/10463710/10464003.pdf?arnumber=10464003
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1. Waveform and Numerology to Support 5G Services and Requirements
2. Power Combiners, Impedance Transformers and Directional Couplers;Grebennikov;High Frequency Electronics,2007
3. Power Dividers and Directional Couplers;Pozar;Microwave Engineering,2013
4. Implementation of N-way Gysel combiners using back to back microstrip structure
5. Compensation for parasitic coupling between RF or microwave transistors in the same package;Bounty,2009
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