Elements of Architecture of Simulator Realized on NetFPGA10G Card
Author:
Affiliation:
1. Poznan University of Technology,Faculty of Computing and Telecommunications,Poznan,Poland,60-965
Funder
Ministry of Science and Higher Education
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9868842/9868856/09868941.pdf?arnumber=9868941
Reference11 articles.
1. NetFPGA SUME: Toward 100 Gbps as Research Commodity
2. The Model of the Queuing System with Adaptive Traffic
3. The system for delay measurement in ethernet networks on NetFPGA cards
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