A Simulation Study of Si/SiGe Dual Insulator Double Gate Heterostructure Junctionless FET (DI-DG-HJL-FET) for RF Applications
Author:
Affiliation:
1. Tula's Institute,Dehradun,India
2. Algoworks Technologies,Noida,India
3. Graphic Era Hill University,Dehradun,India
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10009018/10009023/10009572.pdf?arnumber=10009572
Reference13 articles.
1. Design and Properties of Low noise Silicon Avalanche photodiode;joshi;Futuristic Trends in Electronics and Renewable Energy,2015
2. Dual‐channel trench‐gate tunnel FET for improved ON‐current and subthreshold swing
3. Erratum to: Designing a Hetrostructure Junctionless-Field Effect Transistor (HJL-FET) for High-speed Applications
4. Dual-Channel Junctionless FETs for Improved Analog/RF Per-formance;garg;Silicon,2020
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