300-GHz 2nd-Order Subharmonic Upconversion Mixer Using Symmetric MOS Varactors in 65-nm CMOS
Author:
Funder
SRC Joint University Microelectronic Program and DARP
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/8011414/8952828/09252838.pdf?arnumber=9252838
Cited by 5 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. A 340-GHz Upconversion Mixer MMIC Using an Antiparallel Series Schottky Diode Pair With High Output Power;IEEE Microwave and Wireless Technology Letters;2024-07
2. Two-Port Characterization of Symmetric Varactors in 65-nm CMOS Process for Mixer Applications;2023 IEEE Texas Symposium on Wireless and Microwave Circuits and Systems (WMCS);2023-04-19
3. 300-GHz Double-Balanced Up-Converter Using Asymmetric MOS Varactors in 65-nm CMOS;IEEE Journal of Solid-State Circuits;2022-08
4. High Driven Sub-harmonically Up-conversion Mixers based Schottky Diodes;2022 IEEE 2nd International Maghreb Meeting of the Conference on Sciences and Techniques of Automatic Control and Computer Engineering (MI-STA);2022-05-23
5. 300-GHz Double-Balanced Up-Converter Using Asymmetric MOS Varactors in 65-nm CMOS;IEEE J SOLID-ST CIRC;2022
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