Predicting Chip Failure Rates with Machine Learning in VLSI Design-Reference-Cited by-同舟云学术

Predicting Chip Failure Rates with Machine Learning in VLSI Design

Published:2024-04-04 Issue: Volume:10 Page:1-5
ISSN:
Container-title:2024 Ninth International Conference on Science Technology Engineering and Mathematics (ICONSTEM)
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Author:

Chennakesavulu M.¹,Banu E. Afreen²,Sandhiya R.³,Ramesh D. Raja⁴,Devadas M.⁵,Rathinasabapathi G.⁶

Affiliation:

1. Rajeev Gandhi Memorial College of Engineering and Technology (Autonomous),Department of Electronics and Communication Engineering,Nandyal,Andhra Pradesh,India,518501

2. Saveetha School of Engineering, Saveetha Institute of Medical and Technical Sciences (SIMATS),Department of Computer Science and Engineering,Chennai,Tamil Nadu,India,602105

3. RMK College of Engineering and Technology,Department of Mechanical Engineering,Puduvoyal,Tamil Nadu,India,601206

4. MVGR College of Engineering(A),Department of Electronics and Communication Engineering,Vizianagaram,Andhra Pradesh,India,535005

5. Vaagdevi College Of Engineering,Department of Electronics and Communication Engineering,Warangal,Telangana,India,506005

6. Panimalar Engineering College,Department of Mechanical Engineering,Chennai,Tamil Nadu,India,600123

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx8/10568576/10568577/10568861.pdf?arnumber=10568861

Reference13 articles.

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5. A machine learning approach to chip failure prediction;Liu