Yosys+nextpnr: An Open Source Framework from Verilog to Bitstream for Commercial FPGAs-Reference-Cited by-同舟云学术

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Yosys+nextpnr: An Open Source Framework from Verilog to Bitstream for Commercial FPGAs

Published:2019-04 Issue: Volume: Page:
ISSN:
Container-title:2019 IEEE 27th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)
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Author:

Shah David,Hung Eddie,Wolf Clifford,Bazanski Serge,Gisselquist Dan,Milanovic Miodrag

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/8727045/8735498/08735573.pdf?arnumber=8735573

Cited by 38 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Automated Feature Testing of Verilog Parsers using Fuzzing (Registered Report);Proceedings of the 3rd ACM International Fuzzing Workshop;2024-09-13

2. Simple Siamese Model with Long Short-Term Memory for User Authentication with Field-Programmable Gate Arrays;Electronics;2024-07-01

3. Full Open-Source Implementation of an Academic RISC-V on FPGA;2024 XVI Congreso de Tecnología, Aprendizaje y Enseñanza de la Electrónica (TAEE);2024-06-26

4. Hardware Trojan Dataset of RISC-V and Web3 Generated with ChatGPT-4;Data;2024-06-19

5. Design and Optimization of a Petri Net-Based Concurrent Control System toward a Reduction in the Resources in a Field-Programmable Gate Array;Applied Sciences;2024-06-15

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