Spiker: an FPGA-optimized Hardware accelerator for Spiking Neural Networks-Reference-Cited by-同舟云学术

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Spiker: an FPGA-optimized Hardware accelerator for Spiking Neural Networks

Published:2022-07 Issue: Volume: Page:
ISSN:
Container-title:2022 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
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Author:

Carpegna Alessio¹,Savino Alessandro¹,Di Carlo Stefano¹

Affiliation:

1. Politecnico di Torino,Control and Computer Eng. Dep.,Torino,Italy

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9911984/9911948/09911998.pdf?arnumber=9911998

Cited by 18 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Novel NoC-based SNN Architecture with Optimized Routers;2024 Tenth International Conference on Communications and Electronics (ICCE);2024-07-31

2. SpikingJET: Enhancing Fault Injection for Fully and Convolutional Spiking Neural Networks;2024 IEEE 30th International Symposium on On-Line Testing and Robust System Design (IOLTS);2024-07-03

3. HL-ESViT: High-Low Frequency Efficient Spiking Vision Transformer;2024 International Joint Conference on Neural Networks (IJCNN);2024-06-30

4. SpikeExplorer: Hardware-Oriented Design Space Exploration for Spiking Neural Networks on FPGA;Electronics;2024-05-01

5. Towards Automated FPGA Compilation of Spiking Neural Networks;2024 IEEE 6th International Conference on AI Circuits and Systems (AICAS);2024-04-22

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