EZ-Pass: An Energy & Performance-Efficient Power-Gating Router Architecture for Scalable NoCs-Reference-Cited by-同舟云学术

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EZ-Pass: An Energy & Performance-Efficient Power-Gating Router Architecture for Scalable NoCs

Published:2018-01-01 Issue:1 Volume:17 Page:88-91
ISSN:1556-6056
Container-title:IEEE Computer Architecture Letters
language:
Short-container-title:IEEE Comput. Arch. Lett.

Author:

Zheng Hao^ORCID,Louri Ahmed

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Hardware and Architecture

Link

http://xplorestaging.ieee.org/ielx7/10208/8316264/08214244.pdf?arnumber=8214244

Cited by 18 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. AMA: An Ageing Task Migration Aware for High-Performance Computing;Journal of Low Power Electronics and Applications;2023-05-22

2. Design and implementation of network‐on‐chip router using multi‐priority based iterative round‐robin matching with slip;Transactions on Emerging Telecommunications Technologies;2022-04-22

3. Energy efficient 3D network-on-chip based on approximate communication;Computer Networks;2022-02

4. A Voting Approach for Adaptive Network-on-Chip Power-Gating;IEEE Transactions on Computers;2021-11-01

5. Deflection routing mechanism using BLESS and BBUS NoC;Materials Today: Proceedings;2021-06

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