Author:
Polian I.,Engelke P.,Becker B.,Kundu S.,Galliere J.-M.,Renovell M.
Cited by
29 articles.
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1. Machine Learning Support for Logic Diagnosis and Defect Classification;Machine Learning Support for Fault Diagnosis of System-on-Chip;2022-10-22
2. Test Methodology for Defect-Based Bridge Faults;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2022-07
3. Two Pattern Timing Tests Capturing Defect-Induced Multi-Gate Delay Impact of Shorts;2021 IEEE 39th VLSI Test Symposium (VTS);2021-04-25
4. Test Methodology for Defect-based Bridge Faults;2020 IEEE International Test Conference in Asia (ITC-Asia);2020-09
5. Incomplete Tests for Undetectable Faults to Improve Test Set Quality;ACM Transactions on Design Automation of Electronic Systems;2019-03-21