Author:
Karunaratne Manupa,Wijerathne Dhananjaya,Mitra Tulika,Peh Li-Shiuan
Cited by
18 articles.
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1. RoDMap: A Reserve-on-Demand Mapper for Spatially-Configured Coarse-Grained Reconfigurable Arrays;Proceedings of the 53rd International Conference on Parallel Processing;2024-08-12
2. Optimizing Imperfectly-Nested Loop Mapping on CGRAs via Polyhedral-Guided Flattening;2024 Design, Automation & Test in Europe Conference & Exhibition (DATE);2024-03-25
3. E2EMap: End-to-End Reinforcement Learning for CGRA Compilation via Reverse Mapping;2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA);2024-03-02
4. Flip
: Data-centric Edge CGRA Accelerator;ACM Transactions on Design Automation of Electronic Systems;2023-12-18
5. DFGC: DFG-aware NoC Control based on Time Stamp Prediction for Dataflow Architecture;2023 IEEE 41st International Conference on Computer Design (ICCD);2023-11-06