Author:
Fadiheh Mohammad Rahmani,Muller Johannes,Brinkmann Raik,Mitra Subhasish,Stoffel Dominik,Kunz Wolfgang
Cited by
24 articles.
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1. Towards Trustworthy RISC-V Designs: Formal Verification of the MFENCE Instruction;2024 4th Interdisciplinary Conference on Electrics and Computer (INTCEC);2024-06-11
2. Ensuring SFENCE Instruction Correctness: A Formal Verification Framework Based on Invariants;2024 IEEE International Conference on Electro Information Technology (eIT);2024-05-30
3. ConjunCT: Learning Inductive Invariants to Prove Unbounded Instruction Safety Against Microarchitectural Timing Attacks;2024 IEEE Symposium on Security and Privacy (SP);2024-05-19
4. Lifting Micro-Update Models from RTL for Formal Security Analysis;Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2;2024-04-27
5. Hardware Mitigation and Verification For Rogue In-Flight Data Load Attacks;2023 30th IEEE International Conference on Electronics, Circuits and Systems (ICECS);2023-12-04