Machine Learning Approach for Mixed type Wafer Defect Pattern Recognition by ResNet Architecture
Author:
Affiliation:
1. ISRO,Liquid Propulsion Systems Centre,Trivandrum,India
2. College of Engineering Trivandrum,Department of Electronics and Communication,Trivandrum,India
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10164829/10164822/10165078.pdf?arnumber=10165078
Reference13 articles.
1. A deep convolutional neural network with residual blocks for wafer map defect pattern recognition;wang;Proc Int Work-Conf Artif Neural Netw,2021
2. Squeeze-and-Excitation Networks
3. Semi-Supervised Multi-Label Learning for Classification of Wafer Bin Maps With Mixed-Type Defect Patterns
4. A Convolutional Neural Network for Fault Classification and Diagnosis in Semiconductor Manufacturing Processes
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1. Development of a Wafer Defect Pattern Classifier Using Polar Coordinate System Transformed Inputs and Convolutional Neural Networks;Electronics;2024-04-04
2. An Organized Review of Machine Learning (ML) Perspectives in Manufacturing and Quality Control Processes;2023 International Conference on Power Energy, Environment & Intelligent Control (PEEIC);2023-12-19
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