Time-Coded Spiking Fourier Transform in Neuromorphic Hardware
Author:
Affiliation:
1. Department of Informatics, Technical University of Munich, Munich, Germany
2. Faculty of Electrical and Computer Engineering, Technische Universität Dresden, Dresden, Germany
Funder
Federal Ministry of Education and Research of Germany
Federal Ministry of Education and Research of Germany in the programme of Souverän Digital Vernetzt
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Computational Theory and Mathematics,Hardware and Architecture,Theoretical Computer Science,Software
Link
http://xplorestaging.ieee.org/ielx7/12/9913765/09743682.pdf?arnumber=9743682
Reference32 articles.
1. A reconfigurable on-line learning spiking neuromorphic processor comprising 256 neurons and 128K synapses
2. A Scalable Multicore Architecture With Heterogeneous Memory Structures for Dynamic Neuromorphic Asynchronous Processors (DYNAPs)
3. Braindrop: A Mixed-Signal Neuromorphic Architecture With a Dynamical Systems-Based Programming Model
4. Unsupervised learning from continuous video in a scalable predictive recurrent network;piekniewski,2016
5. SiamSNN: Spike-based Siamese network for energy-efficient and real-time object tracking;luo,2020
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