Architecture design with STT-RAM: Opportunities and challenges

Author:

Chi Ping,Li Shuangchen,Yuanqing Cheng ,Yu Lu ,Kang Seung H.,Xie Yuan

Publisher

IEEE

Cited by 41 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Compiler-Directed Whole-System Persistence;2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA);2024-06-29

2. CASH: Criticality-Aware Split Hybrid L1 Data Cache;Proceedings of the Great Lakes Symposium on VLSI 2024;2024-06-12

3. Enhancing Lifetime and Performance of MLC NVM Caches Using Embedded Trace Buffers;ACM Transactions on Design Automation of Electronic Systems;2024-05-03

4. Usas: A Sustainable Continuous-Learning´ Framework for Edge Servers;2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA);2024-03-02

5. Domain-Specific STT-MRAM-Based In-Memory Computing: A Survey;IEEE Access;2024

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