Controlled placement of standard cell memory arrays for high density and low power in 28nm FD-SOI

Author:

Teman Adam,Rossi Davide,Meinerzhagen Pascal,Benini Luca,Burg Andreas

Publisher

IEEE

Cited by 17 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. TinyForge: A Design Space Exploration to Advance Energy and Silicon Area Trade-offs in tinyML Compute Architectures with Custom Latch Arrays;Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 3;2024-04-27

2. A Standard Cell Memory Based on 2T Gain Cell DRAM for Memory-Centric Accelerator Design;2023 IEEE 36th International System-on-Chip Conference (SOCC);2023-09-05

3. Acceleration of Control Intensive Applications on Coarse-Grained Reconfigurable Arrays for Embedded Systems;IEEE Transactions on Computers;2023-09-01

4. Automatic Generation of Structured Macros Using Standard Cells ‒ Application to CIM;2023 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED);2023-08-07

5. Scalable Hierarchical Instruction Cache for Ultralow-Power Processors Clusters;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-04

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