Author:
Lam Tak-Kei,Yang Xiaoqing,Tang Wai-Chung,Wu Yu-Liang
Cited by
2 articles.
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1. Register Clustering Methodology for Low Power Clock Tree Synthesis;Journal of Computer Science and Technology;2015-03
2. Clock Power Analysis of Low Power Clock Gated Arithmetic Logic Unit on Different FPGA;2014 International Conference on Computational Intelligence and Communication Networks;2014-11