Keynote: Cost-Efficient Reliability for Edge-AI Chips
Author:
Affiliation:
1. Tallinn University of Technology,Department of Computer Systems,Estonia
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10534343/10534590/10534610.pdf?arnumber=10534610
Reference13 articles.
1. A Systematic Literature Review on Hardware Reliability Assessment Methods for Deep Neural Networks
2. DeepVigor: VulnerabIlity Value RanGes and FactORs for DNNs’ Reliability Assessment
3. Enhancing Fault Resilience of QNNs by Selective Neuron Splitting
4. Special session: Reliability assessment recipes for dnn accelerators;Ahmadilivani
5. SAFFIRA: a Framework for Assessing the Reliability of Systolic-Array-Based DNN Accelerators
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