Conflict-Free Parallel Data Access Technology for Matrix Calculation in Memory System of ASIP of 5G/6G Macro Base Stations-Reference-Cited by-同舟云学术

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Conflict-Free Parallel Data Access Technology for Matrix Calculation in Memory System of ASIP of 5G/6G Macro Base Stations

Published:2024-01 Issue:1 Volume:43 Page:99-112
ISSN:0278-0070
Container-title:IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
language:
Short-container-title:IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

Author:

Chen Wei¹^ORCID,Liu Dake¹^ORCID

Affiliation:

1. School of Information and Communication Engineering, Hainan University, Hainan, China

Funder

Hainan Province Science and Technology Major Project

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Link

http://xplorestaging.ieee.org/ielx7/43/10372473/10123957.pdf?arnumber=10123957

Reference26 articles.

1. Design Space Exploration of 1-D FFT Processor

2. Tessellating memory space for parallel access

3. Register array‐based sum of absolute difference processor with parallel memory system for fast motion estimation

4. Designing a shared access memory and its application in data transmission and protection systems

5. A Novel Conflict-Free Parallel Memory Access Scheme for FFT Processors

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