Unleashing the Potential of Sparse DNNs Through Synergistic Hardware-Sparsity Co-Design-Reference-Cited by-同舟云学术

Unleashing the Potential of Sparse DNNs Through Synergistic Hardware-Sparsity Co-Design

Published:2023-04 Issue:4 Volume:42 Page:1147-1160
ISSN:0278-0070
Container-title:IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
language:
Short-container-title:IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

Author:

Ozen Elbruz¹^ORCID,Orailoglu Alex¹^ORCID

Affiliation:

1. Department of Computer Science and Engineering, University of California at San Diego, La Jolla, CA, USA

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Link

Reference65 articles.

1. Learning structured sparsity in deep neural networks;wen;Proc Adv Neural Inf Process Syst,2016

3. The lottery ticket hypothesis: Finding sparse, trainable neural networks;frankle;Proc Int Conf Learn Rep,2018

4. Pruning neural networks without any data by iteratively conserving synaptic flow;tanaka;Proc Adv Neural Inf Process Syst,2020

5. Structured Bayesian pruning via log-normal multiplicative noise;neklyudov;Proc Adv Neural Inf Process Syst,2017

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