A 1.6mm2 4,096 logic elements multi-context FPGA core in 90nm CMOS
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/4695901/4708707/04708736.pdf?arnumber=4708736
Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Normally-Off Computing for Crystalline Oxide Semiconductor-Based Multicontext FPGA Capable of Fine-Grained Power Gating on Programmable Logic Element With Nonvolatile Shadow Register;IEEE Journal of Solid-State Circuits;2015-09
2. Nonvolatile field-programmable gate array using 2-transistor–1-MTJ-cell-based multi-context array for power and area efficient dynamically reconfigurable logic;Japanese Journal of Applied Physics;2015-03-04
3. Crystalline In–Ga–Zn–O FET-based configuration memory for multi-context field-programmable gate array realizing fine-grained power gating;Japanese Journal of Applied Physics;2014-01-01
4. High-Performance Computing Based on High-Speed Dynamic Reconfiguration;High-Performance Computing Using FPGAs;2013
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