A Multimode GSM/DCS/WCDMA Double Loop Frequency Synthesizer-Reference-Cited by-同舟云学术

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A Multimode GSM/DCS/WCDMA Double Loop Frequency Synthesizer

Published:2005-11 Issue: Volume: Page:
ISSN:
Container-title:2005 IEEE Asian Solid-State Circuits Conference
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Author:

Badets Franck,Camino Laurent,Dedieu Sebastien,Belot Didier,Rieubon Sebastien,Divel Thiery,Cerisier Patrick

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/4017511/4017512/04017566.pdf?arnumber=4017566

Cited by 5 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. An integrated 0.38–6 GHz, 9–12 GHz fully differential fractional-N frequency synthesizer for multi-standard reconfigurable MIMO communication application;Analog Integrated Circuits and Signal Processing;2014-01-04

2. Low power fast settling multi-standard current reusing CMOS fractional-Nfrequency synthesizer;Journal of Semiconductors;2012-04

3. A local oscillator for WCDMA band VII based on frequency multiplication;Analog Integrated Circuits and Signal Processing;2012-02-16

4. A fractional-Nfrequency synthesizer-based multi-standard I/Q carrier generation system in 0.13 μm CMOS;Journal of Semiconductors;2011-06

5. A novel dual-loop multi-phase frequency synthesizer;2007 18th European Conference on Circuit Theory and Design;2007-08

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