Logic Process Compatible 40nm 256K×144 Embedded RRAM with Low Voltage Current Limiter and Ambient Compensation Scheme to Improve the Read Window-Reference-Cited by-同舟云学术

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Logic Process Compatible 40nm 256K×144 Embedded RRAM with Low Voltage Current Limiter and Ambient Compensation Scheme to Improve the Read Window

Published:2018-11 Issue: Volume: Page:
ISSN:
Container-title:2018 IEEE Asian Solid-State Circuits Conference (A-SSCC)
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Author:

Lai Chien-An,Chou Chung-Cheng,Weng Chi-Hsiang,Lin Zheng-Jun,Tseng Pei-Ling,Wang Chien-Fan,Wang Chih-Chen,Su Chin-I,Chen Wei-Chi,Lin Yu-Cheng,Ong Tong-Chern,Chang Chi,Chih Yu-Der,Chang Tsung-Yung

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/8547238/8579249/08579345.pdf?arnumber=8579345

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. 15.7 A 32Mb RRAM in a 12nm FinFet Technology with a 0.0249μm² Bit-Cell, a 3.2GB/S Read Throughput, a 10KCycle Write Endurance and a 10-Year Retention at 105°C;2024 IEEE International Solid-State Circuits Conference (ISSCC);2024-02-18

2. High-density analog image storage in an analog-valued non-volatile memory array;Neuromorphic Computing and Engineering;2022-12-01

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