Deep Reinforcement Learning-based Decoupling Capacitor Optimization Method for Multi-Power Domain considering Transfer Noise in 3D-ICs
Author:
Affiliation:
1. Korea Advanced Institute of Science and Technology (KAIST),Electromagnetic Compatibility Laboratory,Daejeon,Republic of Korea
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9994795/9994852/09994990.pdf?arnumber=9994990
Reference5 articles.
1. Modeling and Measurement of Power Supply Noise Effects on an Analog-to-Digital Converter Based on a Chip-PCB Hierarchical Power Distribution Network Analysis
2. Deep Reinforcement Learning-Based Optimal Decoupling Capacitor Design Method for Silicon Interposer-Based 2.5-D/3-D ICs
3. Fast and Accurate Power Distribution Network Modeling of a Silicon Interposer for 2.5-D/3-D ICs With Multiarray TSVs
4. Decoupling Capacitors Placement for a Multichip PDN by a Nature-Inspired Algorithm
5. 3D Packaging Architectures and Assembly Process Design
Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. 3D-IC Power Distribution Network (PDN) Impedance Prediction using Deep Learning (DL);2023 IEEE Electrical Design of Advanced Packaging and Systems (EDAPS);2023-12-12
2. Machine Learning for EMC/SI/PI – Blackbox, Physics Recovery, and Decision Making;IEEE Electromagnetic Compatibility Magazine;2023
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