Author:
Hietanen Mikko,Aikio Janne,Akbar Rehman,Rahkonen Timo,Parssinen Aarno
Cited by
8 articles.
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1. A Wideband Divide-by-2/4 Static CML Frequency Divider With Quadrature Outputs;2024 9th International Conference on Integrated Circuits, Design, and Verification (ICDV);2024-06-06
2. A 28-Gb/s 27.2mW NRZ Full-Rate Bang-Bang Clock and Data Recovery in 22 nm FD-SOI CMOS Technology;2023 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS);2023-10-16
3. Design of a Power-Performance-Area (PPA) Optimized MOS Current Mode Logic Pre-scaler;Circuits, Systems, and Signal Processing;2023-05-13
4. A Broadband and High Speed CML Divider with Inductor Peaking in 40-nm SMIC;2022 IEEE 16th International Conference on Solid-State & Integrated Circuit Technology (ICSICT);2022-10-25
5. A 0.35-mW 70-GHz Self-Resonant E-TSPC Frequency Divider With Backgate Adjustment;IEEE Transactions on Microwave Theory and Techniques;2022-04