Analysing the Impact of Various Deterministic Noise Sources on Jitter in a CMOS Inverter
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Publisher
IEEE
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http://xplorestaging.ieee.org/ielx7/8700085/8711482/08711770.pdf?arnumber=8711770
Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Temperature-Insensitive Ka-Band Transceiver With Ultralow-Noise Self-Calibrated Low Dropout Regulator in 65-nm CMOS;IEEE Transactions on Microwave Theory and Techniques;2023-02
2. A Low-Loss 77 GHz Sub-Sampling Passive Mixer Integrated in a 28-nm CMOS Radar Receiver;ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC);2022-09-19
3. Novel Observations and Physical Insights on PSIJ Behavior in CMOS Chain-of-Inverters;IEEE Access;2022
4. A Thomas Algorithm-Based Generic Approach for Modeling of Power Supply Induced Jitter in CMOS Buffers;IEEE Access;2019
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