Analysis and comparison of leakage power reduction techniques in CMOS circuits

Author:

Singhal Smita,Gaur Nidhi,Mehra Anu,Kumar Pradeep

Publisher

IEEE

Cited by 11 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Design and Implementation of Optimized Low Power Pre-Charge Sense Amplifier;2023 International Conference on Computational Intelligence and Sustainable Engineering Solutions (CISES);2023-04-28

2. Comparative analysis of low power leakage techniques implemented in different CMOS VLSI Circuits;2022 International Conference on Computing, Communication, and Intelligent Systems (ICCCIS);2022-11-04

3. High Stable and Energy Efficient Emerging Nanoscale CNTFET SRAM Cells using Circuit Level Low Power Techniques;Silicon;2022-01-07

4. A Literature Review: Different Leakage Reduction Techniques for CMOS circuits;2021 International Conference on Advancements in Electrical, Electronics, Communication, Computing and Automation (ICAECA);2021-10-08

5. SPICE Based Design and Implementation of Digital Circuits Using GALEOR Technique;Advances in Smart Communication and Imaging Systems;2021

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