An Area Efficient Analog Front-End for Sensing EEG Signals with MOS Capacitors in 90nm Process
Author:
Affiliation:
1. National Sun Yat-sen University,Dept. of Computer Science and Engineering,Kaohsiung,Taiwan
Funder
Ministry of Science and Technology
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10226627/10226615/10226840.pdf?arnumber=10226840
Reference4 articles.
1. CMOS analog front-end IC for EEG applications with high powerline interference Rejection;costa junior;2018 9th Latin American Symposium on Circuits & Systems,2018
2. Exploiting Electrocorticographic Spectral Characteristics for Optimized Signal Chain Design: A 1.08 W Analog Front End With Reduced ADC Resolution Requirements
3. Low-Power High-Input-Impedance EEG Signal Acquisition SoC With Fully Integrated IA and Signal-Specific ADC for Wearable Applications
4. An area-efficient capacitively-coupled instrumentation amplifier with a duty-cycled Gm-C DC servo loop in 0.18-μm CMOS
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