SiGe Qubit Biasing with a Cryogenic CMOS DAC at mK Temperature-Reference-Cited by-同舟云学术

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SiGe Qubit Biasing with a Cryogenic CMOS DAC at mK Temperature

Published:2023-09-11 Issue: Volume: Page:
ISSN:
Container-title:ESSCIRC 2023- IEEE 49th European Solid State Circuits Conference (ESSCIRC)
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Author:

Schreckenberg Lea¹,Otten René²,Vliex Patrick¹,Xue Ran²,Tu Jhih-Sian³,Seidler Inga³,Trellenkamp Stefan³,Schreiber Lars R.²,Bluhm Hendrik²,Waasen Stefan van¹

Affiliation:

1. Electronics and Analytics, Electronic Systems (ZEA-2) Forschungszentrum Jülich GmbH,Central Institute of Engineering,Jülich,Germany,52428

2. JARA Institute for Quantum Information RWTH Aachen University and Forschungszentrum Jülich GmbH,Aachen,Germany,52074

3. Helmholtz Nano Facility (HNF), Forschungszentrum Jülich GmbH,Jülich,Germany,52428

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10268677/10268683/10268801.pdf?arnumber=10268801

Reference25 articles.

1. 19.1 A Scalable Cryo-CMOS 2-to-20GHz Digitally Intensive Controller for 4x32 Frequency Multiplexed Spin Qubits/ Transmons in 22nm FinFET Technology for Quantum Computers;patra;ISSCC,2020

2. CMOS-based cryogenic control of silicon quantum circuits

3. Bias Voltage DAC Operating at Cryogenic Temperatures for Solid-State Qubit Applications

4. A cryogenic CMOS chip for generating control signals for multiple qubits

5. Engineering cryogenic setups for 100-qubit scale superconducting circuit systems

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